We are looking for a Design Verification Engineer (mid-senior level) to join our client’s team in Brașov. This role focuses on verification and validation of RTL designs in the semiconductors industry.

Key Responsibilities

• Collaborate with architects and design engineers to understand new features to be verified.
• Develop test plans, accounting for hardware, firmware, and software driver interactions.
• Estimate effort for writing new feature tests and adapting the test environment.
• Create directed and random verification tests.
• Debug test failures, determine root causes, and collaborate with RTL and firmware engineers.
• Review functional and code coverage metrics; adjust tests to meet coverage requirements.

Requirements

• Bachelor’s or Master’s degree in Computer, Electronics, or Electrical Engineering.
• Relevant experience in ASIC verification.
• Strong expertise in building self-checking testbenches and regression management flows.
• Knowledge of coverage closure techniques.
• Hands-on experience with UVM, Formal Verification, and assertion-based verification.
• Good understanding of communication standards (Ethernet, FlexE, OTN, Interlaken) and SerDes PHY.
• Fluency in Verilog or SystemVerilog.
• Strong debugging and problem-solving skills.
• Excellent communication skills and ability to work in collaborative teams.
• Mandatory: Romanian & English languages

Location & Work Schedule

• 📍 On-site, Brașov
• Full-time position
• Type of contract: B2B